{"id":45,"date":"2019-05-29T23:04:37","date_gmt":"2019-05-29T23:04:37","guid":{"rendered":"https:\/\/scholars.spu.edu\/meap\/?page_id=45"},"modified":"2019-06-03T02:26:17","modified_gmt":"2019-06-03T02:26:17","slug":"schematics","status":"publish","type":"page","link":"https:\/\/scholars.spu.edu\/meap\/schematics\/","title":{"rendered":"Schematics"},"content":{"rendered":"\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"535\" src=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/1-1-1024x535.png\" alt=\"\" class=\"wp-image-133\" srcset=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/1-1-1024x535.png 1024w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/1-1-300x157.png 300w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/1-1-768x401.png 768w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/1-1.png 1432w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>Figure 1: Schematic for MCP16331 and TLC555L (House power)<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1430\" height=\"519\" src=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/2-1024x372.png\" alt=\"\" class=\"wp-image-134\" srcset=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/2-1024x372.png 1024w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/2-300x109.png 300w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/2-768x279.png 768w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/2.png 1430w\" sizes=\"auto, (max-width: 1430px) 100vw, 1430px\" \/><\/figure>\n\n\n\n<p>Figure 2: Schematic for LM 5176 interleave 1<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"426\" src=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/3-1024x426.png\" alt=\"\" class=\"wp-image-135\" srcset=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/3-1024x426.png 1024w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/3-300x125.png 300w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/3-768x320.png 768w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/3.png 1429w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>Figure 3: Schematic for LM 5176 interleave 2<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"327\" src=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/4-1024x327.png\" alt=\"\" class=\"wp-image-136\" srcset=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/4-1024x327.png 1024w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/4-300x96.png 300w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/4-768x245.png 768w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/4.png 1430w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>Figure 4: Schematic for power path and Isolated Gate Drivers Interleaved\n1 <\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"337\" src=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/5-1024x337.png\" alt=\"\" class=\"wp-image-137\" srcset=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/5-1024x337.png 1024w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/5-300x99.png 300w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/5-768x253.png 768w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/5.png 1431w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>Figure 5: Schematic for power path and Isolated Gate Drivers\nInterleaved 2<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"432\" src=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/6-1024x432.png\" alt=\"\" class=\"wp-image-138\" srcset=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/6-1024x432.png 1024w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/6-300x127.png 300w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/6-768x324.png 768w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/6.png 1431w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>Figure 6: Schematic for the FPGA<\/p>\n\n\n\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"879\" src=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/7-1024x879.png\" alt=\"\" class=\"wp-image-139\" srcset=\"https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/7-1024x879.png 1024w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/7-300x257.png 300w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/7-768x659.png 768w, https:\/\/scholars.spu.edu\/meap\/wp-content\/uploads\/sites\/15\/2019\/06\/7.png 1494w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>Figure 7: FPGA Schematic<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Figure 1: Schematic for MCP16331 and TLC555L (House power) Figure 2: Schematic for LM 5176 interleave 1 Figure 3: Schematic for LM 5176 interleave 2 Figure 4: Schematic for power path and Isolated Gate Drivers Interleaved 1 Figure 5: Schematic for power path and Isolated Gate Drivers Interleaved 2 Figure 6: Schematic for the FPGA [&hellip;]<\/p>\n","protected":false},"author":38,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_exactmetrics_skip_tracking":false,"_exactmetrics_sitenote_active":false,"_exactmetrics_sitenote_note":"","_exactmetrics_sitenote_category":0,"footnotes":""},"class_list":["post-45","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/pages\/45","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/users\/38"}],"replies":[{"embeddable":true,"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/comments?post=45"}],"version-history":[{"count":5,"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/pages\/45\/revisions"}],"predecessor-version":[{"id":154,"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/pages\/45\/revisions\/154"}],"wp:attachment":[{"href":"https:\/\/scholars.spu.edu\/meap\/wp-json\/wp\/v2\/media?parent=45"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}